Ge_Jiwen.pdf (2.07 MB)

Concurrent Transaction Logic with Priority and Timing Constraints

thesis

posted on 08.06.2021, 11:34 authored by Jiwen Ge

Concurrent Transaction Logic with Priority and Timing Constraints

History

Language

eng

Program

Electrical and Computer Engineering

Granting Institution

Ryerson University

Thesis Advisor

Marcus Santos

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Electrical and Computer Engineering (Theses)

Categories

Uncategorized content

Keywords

Computer programming Logic

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