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Measuring the Power Efficiency Of Subthreshold FPGAs For Implementing Portable Biomedical Applications

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posted on 08.06.2021, 11:03 by Shahin S. Lotfabadi
Power is a significant design constraint for implementing portable applications. Operating transistors in the subthreshold region can significantly reduce power consumption while reducing performance. The low frequency nature of biosignals makes a FPGA operating subthreshold region a good candidate. In this work, I investigate the feasibility of desinging such a device and the trade-off between power consumpation and performance for FPGA routing resources operating in the subthreshold region. For the 32nm Predictive Technology Model studied in this work, it was observed a power reduction of 197.7 times (or power-delay-product reduction of 3.3 times) for operating under a supply voltage of 0.4 volts (as compared to normal operation in the saturation region using a 0.9V). Under a supply voltage of 0,4 volts, FPGA can operate at 2.0 MHz while allowing signals to propagate unregistered through 20 routing tracks which meets the real-time requirement for processing 20000 samples per second.





Electrical and Computer Engineering

Granting Institution

Ryerson University