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Unidirectional Multi-Bit FPGA Architecture For Area Efficient Implementation of Datapath Circuits

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posted on 23.05.2021, 09:52 by Omesh Mutukuda
Field Programmable Gate Arrays (FPGAs) are increasingly being used to implement large datapath-oriented application that are designed to process multiple-bit wide data. Studies have shown that the regularity of these multi-bit signals can be effectively exploited to reduce the implementation area of datapath circuits on FPGAs that employ the traditional bidirectional routing. Most of modern FPGAs, however, employ unidirectional routing tracks which are more area and delay efficient. No study has investigated the design of multi-bit routing resources that can effectively transport multiple-bit wide signals using unidirectional routing tracks. This paper presents such an investigation of architectures which employ multi-bit connections and unidirectional routing resources to exploit datapath regularity. It is experimentally shown that unidirectional multi-bit architectures are 8.6% more area efficient than the conventional architecture. Additionally, this paper determines the most are efficient proportion of multi-bit connections.

History

Language

eng

Degree

Master of Science

Program

Electrical and Computer Engineering

Granting Institution

Ryerson University

LAC Thesis Type

Thesis

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Electrical and Computer Engineering (Theses)

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